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| NTMS5P02R2 Power MOSFET -5.4 Amps, -20 Volts P-Channel Enhancement-Mode Single SO-8 Package Features * High Density Power MOSFET with Ultra Low RDS(on) * * * * * Providing Higher Efficiency Miniature SO- 8 Surface Mount Package - Saves Board Space Diode Exhibits High Speed with Soft Recovery IDSS Specified at Elevated Temperature Drain- to- Source Avalanche Energy Specified Mounting Information for the SO- 8 Package is Provided VDSS -20 V http://onsemi.com RDS(ON) TYP 26 m @ -4.5 V ID MAX -5.4 A Applications * Power Management in Portable and Battery-Powered Products, i.e.: Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones MAXIMUM RATINGS Please See the Table on the Following Page G Single P-Channel D S 8 1 SO-8 CASE 751 STYLE 13 MARKING DIAGRAM & PIN ASSIGNMENT N.C. Source Source Gate 1 2 3 4 Top View E5P02 L Y WW = Device Code = Assembly Location = Year = Work Week E5P02 LYWW 8 7 6 5 Drain Drain Drain Drain ORDERING INFORMATION Device NTMS5P02R2 Package SO-8 Shipping 2500/Tape & Reel (c) Semiconductor Components Industries, LLC, 2003 1 June, 2003 - Rev. 1 Publication Order Number: NTMS5P02R2/D NTMS5P02R2 MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Drain-to-Gate Voltage (RGS = 1.0 mW) Gate-to-Source Voltage - Continuous Thermal Resistance Junction-to-Ambient (Note 1) Total Power Dissipation @ TA = 25C Continuous Drain Current @ 25C Continuous Drain Current @ 70C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4) Thermal Resistance Junction-to-Ambient (Note 2) Total Power Dissipation @ TA = 25C Continuous Drain Current @ 25C Continuous Drain Current @ 70C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4) Thermal Resistance Junction-to-Ambient (Note 3) Total Power Dissipation @ TA = 25C Continuous Drain Current @ 25C Continuous Drain Current @ 70C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = -20 Vdc, VGS = -5.0 Vdc, Peak IL = -8.5 Apk, L = 10 mH, RG = 25 ) 1. 2. 3. 4. Symbol VDSS VDGR VGS RJA PD ID ID PD ID IDM RJA PD ID ID PD ID IDM RJA PD ID ID PD ID IDM TJ, Tstg EAS Value -20 -20 10 50 2.5 -7.05 -5.62 1.2 -4.85 -28 85 1.47 -5.40 -4.30 0.7 -3.72 -20 159 0.79 -3.95 -3.15 0.38 -2.75 -12 - 55 to +150 360 260 Unit V V V C/W W A A W A A C/W W A A W A A C/W W A A W A A C mJ C Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds TL Mounted onto a 2 square FR-4 Board (1 sq. 2 oz Cu 0.06 thick single sided), t 10 seconds. Mounted onto a 2 square FR-4 Board (1 sq. 2 oz Cu 0.06 thick single sided), t = steady state. Minimum FR-4 or G-10 PCB, t = Steady State. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. http://onsemi.com 2 NTMS5P02R2 ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) (Note 5) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = -250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = -16 Vdc, VGS = 0 Vdc, TJ = 25C) (VDS = -16 Vdc, VGS = 0 Vdc, TJ = 125C) (VDS = -20 Vdc, VGS = 0 Vdc, TJ = 25C) Gate-Body Leakage Current (VGS = -10 Vdc, VDS = 0 Vdc) Gate-Body Leakage Current (VGS = +10 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = -250 Adc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = -4.5 Vdc, ID = -5.4 Adc) (VGS = -2.5 Vdc, ID = -2.7 Adc) Forward Transconductance (VDS = -9.0 Vdc, ID = -5.4 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 6 & 7) Turn-On Delay Time Rise Time Turn-Of f Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Of f Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge BODY-DRAIN DIODE RATINGS (Note 6) Diode Forward On-Voltage Reverse Recovery Time (IS = -5.4 Ad VGS = 0 Vdc, 5 4 Adc, Vd dIS/dt = 100 A/s) Reverse Recovery Stored Charge 5. Handling precautions to protect against electrostatic discharge is mandatory. 6. Indicates Pulse Test: Pulse Width = 300 s max, Duty Cycle = 2%. 7. Switching characteristics are independent of operating junction temperature. (IS = -5.4 Adc, VGS = 0 V) (IS = -5.4 Adc, VGS = 0 Vdc, TJ = 125C) VSD trr ta tb QRR -0.95 -0.72 40 20 20 0.03 -1.25 75 C Vdc ns (VDS = -16 Vdc, VGS = -4.5 Vdc, ID = -5.4 Ad ) 5 4 Adc) (VDD = -16 Vdc, ID = -5.4 Adc, VGS = -4.5 Vdc, -4 5 Vdc RG = 6.0 ) (VDD = -16 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc, -4 5 Vdc RG = 6.0 ) td(on) tr td(off) tf td(on) tr td(off) tf Qtot Qgs Qgd 18 25 70 55 22 70 65 90 20 4.0 7.0 35 50 125 100 35 nC ns ns (VDS = -16 Vdc, VGS = 0 Vdc, 16 Vd Vd f = 1.0 MHz) Ciss Coss Crss 1375 510 200 1900 900 380 pF VGS(th) -0.65 RDS(on) gFS 0.026 0.037 15 0.033 0.048 Mhos -0.9 2.9 -1.25 Vdc mV/C V(BR)DSS -20 IDSS IGSS IGSS 100 -100 nAdc -0.2 -1.0 -10 nAdc -15 Vdc mV/C Adc Symbol Min Typ Max Unit http://onsemi.com 3 NTMS5P02R2 12 -I D, DRAIN CURRENT (AMPS) 10 8 6 4 -1.7 V 2 0 VGS = -1.3 V 0 0.25 0.5 0.75 1 1.25 1.5 1.75 -V DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 2 -2.7 V -2.5 V -8 V -2.3 V -4.5 V -3.7 V -3.1 V 12 -I D, DRAIN CURRENT (AMPS) TJ = 25C -2.1 V VDS -10 V 10 8 6 100C 4 2 0 25C TJ = -55C -1.9 V 1 2.5 1.5 2 -V GS, GATE-T O-SOURCE VOLTAGE (VOLTS) 3 Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.08 ID = -5.4 A TJ = 25C 0.06 0.05 TJ = 25C 0.04 VGS = -2.7 V 0.03 VGS = -4.5 V 0.02 VGS = -2.5 V 0.04 0.02 0 0 2 4 6 8 -V GS, GATE-T O-SOURCE VOLTAGE (VOLTS) 10 0.01 2 4 8 10 6 -I D, DRAIN CURRENT (AMPS) 12 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) Figure 3. On-Resistance versus Gate-T o-Source Voltage 1.6 ID = -5.4 A VGS = -4.5 V 10,000 Figure 4. On-Resistance versus Drain Current and Gate Voltage VGS = 0 V 1.4 -I DSS, LEAKAGE (nA) TJ = 150C 1.2 1000 TJ = 125C 1 0.8 0.6 -50 100 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150 2 4 8 14 16 18 6 10 12 -V DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 20 Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-To-Source Leakage Current versus Voltage http://onsemi.com 4 NTMS5P02R2 -V GS , GATE-T O-SOURCE VOLTAGE (VOLTS) -V DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VDS = 0 V Ciss C, CAPACITANCE (pF) 3000 Crss 2000 Ciss 1000 Coss 0 10 5 Crss 0 -V GS -V DS GATE-T O-SOURCE OR DRAIN-T O-SOURCE VOLTAGE (VOLTS) 5 10 15 20 VGS = 0 V TJ = 25C 5 QT 4 -V DS Q1 Q2 -V GS 16 20 4000 3 12 2 ID = -5.4 A TJ = 25C 8 1 0 0 4 8 12 16 4 0 20 24 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge Figure 7. Capacitance Variation 1000 -I S, SOURCE CURRENT (AMPS) VDD = -16 V ID = -5.4 A VGS = -4.5 V t, TIME (ns) 5 4 3 2 1 0 VGS = 0 V TJ = 25C td(off) tf tr 100 td(on) 10 1 10 RG, GATE RESISTANCE (OHMS) 100 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -V SD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current DRAIN-T O-SOURCE DIODE CHARACTERISTICS 100 ID , DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 10 di/dt 10 ms 1 ta RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.1 1 10 IS trr tb TIME dc 100 tp IS 0.25 IS 1 ms VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Diode Reverse Recovery Waveform http://onsemi.com 5 NTMS5P02R2 TYPICAL ELECTRICAL CHARACTERISTICS 10 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.05 0.02 0.01 Chip 0.0163 0.1 Normalized to ja at 10s. 0.0652 0.1988 0.6411 0.9502 0.01 0.0307 F 0.1668 F 0.5541 F 1.9437 F 72.416 F SINGLE PULSE 0.001 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 t, TIME (s) 1.0E+00 1.0E+01 1.0E+02 Ambient 1.0E+03 Figure 13. Thermal Response INFORMATION FOR USING THE SO-8 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a solder reflow process. 0.060 1.52 0.275 7.0 0.155 4.0 0.024 0.6 0.050 1.270 inches mm SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 6 NTMS5P02R2 TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 14 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems, but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177 -189 C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. STEP 1 PREHEAT ZONE 1 "RAMP" 200C STEP 2 STEP 3 VENT HEATING "SOAK" ZONES 2 & 5 "RAMP" STEP 4 HEATING ZONES 3 & 6 "SOAK" DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C 160C STEP 5 STEP 6 STEP 7 HEATING VENT COOLING ZONES 4 & 7 205 TO 219C "SPIKE" PEAK AT 170C SOLDER JOINT 150C 100C 100C DESIRED CURVE FOR LOW MASS ASSEMBLIES 5C 140C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 14. Typical Solder Heating Profile http://onsemi.com 7 NTMS5P02R2 PACKAGE DIMENSIONS SO-8 CASE 751-07 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 -XA 8 5 B 1 4 S 0.25 (0.010) M Y M -YG C -ZH D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S STYLE 13: PIN 1. 2. 3. 4. 5. 6. 7. 8. N.C. SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 NTMS5P02R2/D |
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